PLANALITH

The level of performance of the majority of electronic devices is governed by two key parameters; (i) the properties of the electroactive materials employed, and (ii) key device dimension(s). In the case of a printed thin-film transistor (TFT), the current-driving capability of the device is primarily determined by the charge carrier mobility of the semiconductor and the transistor channel dimensions namely channel length and width. Similarly, in the case of printed rectifying diodes, such as Schottky diodes, the maximum rectification frequency attainable is determined by the charge carrier mobility of the semiconductor and the thickness of the active layer as well as the active area of the device. Although much effort in recent years has been focused on the development of novel materials with improved electronic properties, relatively little progress has been achieved in developing alternative patterning techniques that combine extreme downscaling of key device dimensions with high manufacturing throughput and yield.

Laterally aligned asymmetric metal electrodes with nanometre-scale separation offer unique advantages for application in co-planar rectifying diodes which include reduced parasitic capacitance and potentially ultra-low reverse currents. Existing fabrication routes for these structures, e.g. electron-beam lithography, oblique-angle shadow-evaporation, etc, suffer from extremely low throughput, poor scalability to larger substrate sizes, complex multi-step processing protocols, and/or high equipment costs. In the Plastic Nanoelectronics by Adhesion Lithography (PLANALITH) project we are exploring the use of a novel patterning technique, namely adhesion lithography (a-Lith) to develop devices based on large aspect ratio a/symmetric metal electrode nanogaps (i.e. inter-electrode distance <50 nm).

Co-planar nanogap electrode structures developed by a-Lith can be combined with solution processable semiconducting materials such as low-temperature solution-processable metal oxides or organic materials to form rectifying diodes which can then be incorporated into rectifying circuits. Because of the unique combination of the co-planar device layout with the ultra-short inter-electrode distance and the high charge carrier mobility of the semiconductors to be used, high operating frequencies are anticipated, making such diodes of interest for incorporating into systems such as RF energy harvesting circuits.

A key part of the PLANALITH project will be the development of an automated a-Lith system that will enable the manufacturing and optimisation of a large number of devices in a controlled manner with high yield.

Technical programme

Technical programme
Posted in Projects.