Work begins on Plastic Nanoelectronics by Adhesion Lithography (PLANALITH) project

PLANALITH (700x335)Led by Professor Thomas Anthopoulos, Imperial College London, the EPSRC Centre has started a new project on Plastic Nanoelectronics by Adhesion Lithography (PLANALITH). PLANALITH is part of the Advanced Manufacturing Process Theme within the EPSRC Centre’s Technical Programme.

PLANALITH will explore the use of a novel patterning technique, adhesion lithography (a-Lith), for the development of devices based on metal electrode nanogaps with inter-electrode distance <50 nm. The a-Lith process entails deposition of a metallophilic self-assembled monolayer (SAM) over a patterned metal thin film followed by deposition of a second metal film. Owing to the presence of the SAM, the adhesion of the second metal to the first metal layer is much weaker than its adhesion to the substrate. If an adhesive tape is applied to the surface and then peeled away, the second metal detaches from the first metal layer and remains only in those areas where the substrate was exposed, thus leaving the two metals side-by-side on the substrate separated by just the length of the SAM – a few nanometres. These co-planar nanogaps electrode structures will be combined with solution processable semiconducting materials such as low temperature processed metal oxides and/or organic semiconductors, to form rectifying Schottky diodes. Because of the co-planar design, ultra-short inter-electrode distance of the device and the high mobility of the semiconductors, high operating frequencies are anticipated. These diodes could then be used as the basis for a rectifying bridge for radio frequency (RF) energy harvesting applications. In parallel to demonstrating functional prototype devices and systems, the project will also explore the scalability of a-lith fabrication technique for the particular metal nano-junction application.

The objectives of the project are:

  • To demonstrate co-planar asymmetric metal nano-gaps (<50 nm inter-electrode spacing) with high yield using the a-Lith technique.
  • To demonstrate high operating frequency (>15 MHz) rectifying co-planar diodes based on metal nano-gap device architectures and different solution processable semiconductors.
  • To demonstrate prototype RF bridge rectifier circuits utilising the best performing co-planar diodes.

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